Please use this identifier to cite or link to this item: http://dspace.uniten.edu.my/jspui/handle/123456789/5247
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dc.contributor.authorYeap, K.H.en_US
dc.contributor.authorAhmad, I.en_US
dc.contributor.authorRizman, Z.I.en_US
dc.contributor.authorChew, K.en_US
dc.contributor.authorChong, K.H.en_US
dc.contributor.authorYong, Y.T.en_US
dc.date.accessioned2017-11-15T02:57:00Z-
dc.date.available2017-11-15T02:57:00Z-
dc.date.issued2010-
dc.description.abstractIn this paper, we investigate the properties of a sub micron pMOS with a single layer of metallization. The fabrication process and electrical characterization of the device were simulated using the SILVACO TCAD tools. We have applied constant field scaling on the effective channel length, the density of ion implantation for threshold voltage adjustment, and gate oxide thickness. To suppress short channel effects, we have also applied retrograde well implantation, Shallow Trench Isolation (STI), sidewall spacer deposition, silicide formation, and Lightly Doped Drain implantation in our process simulation. We have validated the electrical performance of the device by plotting and analyzing the ID - Vg relationship. ©2010 IEEE.
dc.language.isoenen_US
dc.titleCharacterization of a submicron PMOS in mixer circuitsen_US
dc.typeConference Paperen_US
dc.identifier.doi10.1109/STUDENT.2010.5686992-
item.fulltextNo Fulltext-
item.grantfulltextnone-
Appears in Collections:COE Scholarly Publication
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