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|Title:||Pass transistor logic ALU design||Authors:||Wagiran, R.
|Issue Date:||2002||Abstract:||The work presented here shows the comparison of IC design using Tanner EDA (arithmetic logic unit) of 74382 IC using static logic gate and pass logic gate. Tanner tools are used for the schematic and layout simulation as well as the schematic versus layout comparison. The simulation technology used is Mosis 2.0 pm. ©2002 IEEE.||URI:||http://dspace.uniten.edu.my:80/jspui/handle/123456789/5334|
|Appears in Collections:||COE Scholarly Publication|
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