Please use this identifier to cite or link to this item:
|Title:||Influence of optimization of process parameters on threshold voltage for development of hfo2/tisi2 18 nm pmos||Authors:||Atan, N.
Ion implantation methods
|Issue Date:||2016||Publisher:||EDP Sciences||Conference:||MATEC Web of Conferences||Abstract:||Manufacturing a 18-nm transistor requires a variety of parameters, materials, temperatures, and methods. In this research, HfO2 was used as the gate dielectric ad TiO2 was used as the gate material. The transistor HfO2/TiSi2 18-nm PMOS was invented using SILVACO TCAD. Ion implantation was adopted in the fabrication process for the method's practicality and ability to be used to suppress short channel effects. The study involved ion implantation methods: compensation implantation, halo implantation energy, halo tilt, and source-drain implantation. Taguchi method is the best optimization process for a threshold voltage of HfO2/TiSi2 18-nm PMOS. In this case, the method adopted was Taguchi orthogonal array L9. The process parameters (ion implantations) and noise factors were evaluated by examining the Taguchi's signal-to-noise ratio (SNR) and nominal-the-best for the threshold voltage (VTH). After optimization, the result showed that the VTH value of the 18-nm PMOS device was-0.291339. Â© 2016 The Authors, published by EDP Sciences.||URI:||http://dspace.uniten.edu.my:8080/jspui/handle/123456789/6||DOI:||10.1051/matecconf/20167801019|
|Appears in Collections:||COE Scholarly Publication|
Show full item record
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.