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http://dspace.uniten.edu.my/jspui/handle/123456789/8701
DC Field | Value | Language |
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dc.contributor.author | Chan, S.T.Y. | |
dc.contributor.author | Chau, C.F. | |
dc.contributor.author | Bin Ghazali, A. | |
dc.date.accessioned | 2018-02-20T05:45:48Z | - |
dc.date.available | 2018-02-20T05:45:48Z | - |
dc.date.issued | 2013 | |
dc.identifier.uri | http://dspace.uniten.edu.my/jspui/handle/123456789/8701 | - |
dc.description.abstract | Quantum-dot Cellular Automata (QCA) is one of the new emerging nanotechnologies explored as an alternative to current CMOS designs. This paper presents the fundamental concepts of QCA and QCA-based logic design. Basic QCA logic circuits such as the inverter, three-input majority gate and five-input majority gate are studied and implemented using QCADesigner. To demonstrate the practical use of using QCA in logic design, a 4-bit ripple adder using a combined concepts from the conventional RCA and CLA is proposed using 20 three-input majority gates, 4 five-input majority gates and 12 inverters. The proposed adder uses 1246 cells which resulted in an area of 1.75um × 1.43um, and a latency of 5.75 clock cycles. © 2013 IEEE. | |
dc.title | Design of a 4-bit ripple adder using Quantum-dot Cellular Automata (QCA) | |
item.fulltext | No Fulltext | - |
item.grantfulltext | none | - |
Appears in Collections: | COE Scholarly Publication |
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