Please use this identifier to cite or link to this item: http://dspace.uniten.edu.my/jspui/handle/123456789/10672
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dc.contributor.authorNoor Faizah, Z.A.en_US
dc.contributor.authorAhmad, I.en_US
dc.contributor.authorKer, P.J.en_US
dc.contributor.authorMenon, P.S.en_US
dc.contributor.authorAfifah Maheran, A.H.en_US
dc.contributor.authorMah, S.K.en_US
dc.date.accessioned2018-11-07T08:19:24Z-
dc.date.available2018-11-07T08:19:24Z-
dc.date.issued2018-
dc.description.abstractIn this study, the effect of process parameters on the threshold voltage (Vth) and leakage current (Ileak) were explored and the optimization of these parameters were carried out using the Taguchi method. The virtual device was initially constructed using ATHENA and ATLAS environment in Silvaco Technology Computer Aided Design (TCAD) tools. The simulation studies were directed under four varying process parameters, which are Vt adjust implantation dose, the halo tiling angle, the S/D implantation dose and the compensation implantation dose. The L9 Orthogonal Array (OA), the signal-to-noise ratio (SNR), and the analysis of variance (ANOVA) were used to study the performance characteristics and to gain an optimum combination of parameter settings. It was revealed that the Vt adjust implantation dose was the most influential parameter on the Vth and Ileak. Furthermore, it also improves the device performance. The result of Vth complied with the projections made by the International Technology Roadmap for Semiconductors (ITRS). © 2018 Universiti Teknikal Malaysia Melaka. All Rights Reserved.en_US
dc.language.isoenen_US
dc.relation.ispartofJournal of Telecommunication, Electronic and Computer Engineering Volume 10, Issue 2-7, 2018, Pages 143-146en_US
dc.titleOptimization of process parameters for threshold voltage and leakage current based on taguchi methoden_US
dc.typeArticleen_US
item.fulltextNo Fulltext-
item.grantfulltextnone-
Appears in Collections:CCI Scholarly Publication
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